This chapter is partly tutorial and partly technical reference: in additional to documenting the Rice ELEC 201 RoboBoard hardware, it explains the design in a way that assumes minimal background in digital electronics. Additional explanatory material can be found in the Glossary (Appendix B) and in Chapter 12.
The information presented here should be considered optional, as it is not strictly necessary to know it to build a robot. Hopefully though, this chapter will satisfy most readers' curiosity about how the ELEC 201 hardware works.
At the most primitive level, a computer consists of a microprocessor, which executes instructions, and a memory, for storing those instructions (as well as other data).
Figure 5.1 is a block diagram of the microprocessor and memory, showing four types of wires that connect the two:
Things are a little more complex with the particular microprocessor that is used in the RoboBoard, the Motorola 68HC11. On the 68HC11, the eight data bus wires take turns acting as address wires as well.
When a memory location is accessed (for reading or writing), the data wires act first as address wires, transmitting the eight lower-order bits of the address. Then they function as data wires, either transmitting a data byte (for a write cycle) or receiving a data byte (for a read cycle). All of this happens very fast -- 2 million times per second on the RoboBoard.
This kind of split-personality bus is referred to as a multiplexed address and data bus. The memory needs help to deal with a multiplexed address/data bus, provided by an 8-bit latch. This chip (the 74HC373) performs the function of latching, or storing, the 8 address values so that the memory will have the full 15-bit address available for reading or writing data.
Figure 5.2 shows how the latch is wired. The upper 7 address bits are normal, and run directly from the microprocessor to the memory. The lower 8 bits are the multiplexed address and data bus. These wires connect to the inputs of the latch and also to the data inputs of the memory.
An additional signal, the Address Strobe output of the microprocessor, tells the latch when to grab hold of (latch) the address values from the address/data bus.
When the full 15-bit address is available to the memory (7 bits direct from the microprocessor and 8 bits from the latch), the read or write transaction can occur. Because the address/data bus is also wired directly to the memory, data can flow in either direction between the memory and the microprocessor.
The entire process -- transmitting the lower address bits, latching these bits, and then the read or write transaction with the memory -- is orchestrated by the microprocessor. The E clock, the Read/Write line, and the Address Strobe line perform in tight synchronization to make sure these operations happen in the correct sequence and within the timing capacities of the actual chip hardware.
So far we have seen how a memory can be connected to the address space of a microprocessor. In a circuit like the one of the RoboBoard, the microprocessor must interact with other devices besides the memory -- for example, motors and sensors.
A typical solution uses 8-bit latches for input and output. These latches are connected to the data bus of the microprocessor so that they appear like a location in memory. Then, the act of reading or writing from one of these memory locations causes data to be read from or written to a latch -- to which the external devices are connected.
Figure 5.3 is a block diagram of the ELEC 201 RoboBoard system. Notice that chips marked "574" are connected to the data bus. The '574s have outputs that control the motors (through other chips marked "L298N", which will be discussed later). The digital sensors are driven onto the data bus by a chip marked "245." Another '574 chip is used for eight bits of digital output.
The following discussion will show how both the 32K RAM memory and the digital input and output interface chips share the address space of the microprocessor.
The 68HC11 has a total of 16 address bits, yielding 65536 ("64K") bytes of addressable locations. Half of this space will be taken up by the 32K memory chip (also known as a RAM chip, for "Random Access Memory").
The 68HC11 has a bank of interrupt vectors, which are hardware-defined locations in the address space where the microprocessor expects to find pointers to driver routines. When the microprocessor is reset, it finds the reset vector to determine where it should begin running a program.
These vectors are located in the upper 32K of the address space. Thus, it is logical to map the RAM into this upper block, so that the RAM may be used to store these vectors.
The technique used to map the memory to the upper 32K block is fairly simple. Whenever the 68HC11's A15 (the highest-order address